`rpmsg-aen`

[UNTESTED] — v0.6 paper-correct, blocked on AEN memory map

The AEN701 preset's memory_map: block carries TBD strings on the carve-out fields. west alp-build no longer aborts on TBD metadata — instead the orchestrator emits a status: blocked entry in system-manifest.yaml with the reason, and the generated <alp/system_ipc.h> carries an #error directive so the slice compile trips at consumer build time with a clear message. CI's manifest-shape + determinism gates pass; HiL bring-up unblocks when the authoritative AEN memory map lands.

Heterogeneous-compute demo for E1M-AEN701 (Alif Ensemble E7). The E7 die carries a 2-core Cortex-A32 cluster plus two Cortex-M55 cores (HP + HE). This example wires:

a32_cluster — Yocto Linux consumer under linux/.
m55_hp — Zephyr producer under m55_hp/ reading the carrier's on-board LSM6DSO + BMP581 sensors and publishing them over RPMsg.
m55_he — left at the SoM topology default (stock-shim Zephyr image); the always-on M55-HE core stays alive for future low-power offload but doesn't participate in this demo's RPMsg channel.

Source: examples/rpmsg-aen/.

`board.yaml`

schema_version: 2

som:
  sku: E1M-AEN701
  hw_rev: r1

carrier:
  name: E1M-EVK
  populated:
    lsm6dso: true
    bmp581:  true

cores:
  a32_cluster:
    os: yocto
    app: ./linux
    image: alp-image-edge
    libraries: [mbedtls, nlohmann_json]
  m55_hp:
    os: zephyr
    app: ./m55_hp
    peripherals: [i2c]
    libraries: [cmsis_dsp]
  m55_he:
    os: off              # explicit: peer core present in silicon, unused here

ipc:
  - kind: rpmsg
    endpoints: [a32_cluster, m55_hp]
    carve_out_kb: 256
    name: alp_default_rpmsg
    cacheable: true            # AEN M55 cores have data caches

Cache policy

AEN flips the carve-out from V2N's non-cacheable default to cacheable — the M55 cores have data caches, so <alp/rpc.h> automatically inserts cache-maintenance points around every send/recv. Application code never touches cache ops directly.

board.yaml​

Cache policy​

See also​

`board.yaml`

Cache policy

See also