v2n-gd32-bridge-ping

Continuous PING + GET_VERSION liveness probe against the V2N module's on-module GD32G553 supervisor MCU over the 25 MHz SPI fast path (the silicon-validated full-DMA slave / zero-interrupt polled-master configuration). The I²C management path is deliberately not opened — it has its own HIL coverage.

Source: examples/v2n/v2n-gd32-bridge-ping/.

What it does

1. Opens the GD32 SPI bus at 25 MHz.
2. Calls gd32g553_init(...) in a 200 ms retry loop until the GD32 answers — the CM33 boots before the GD32 leaves reset (shared PMIC reset-out), so a one-shot init would race it. The driver issues PING then GET_VERSION and refuses a major-version mismatch.
3. PINGs forever at 2 Hz; every 8th cycle re-reads the firmware version. GET_VERSION's 7-byte reply is deliberately odd-length — it stresses the GD32 reply path's FIFO-residue handling alongside the 4-byte (even) PING.

board.yaml

som:
  sku: E1M-V2N101

preset: e1m-x-evk

cores:
  m33_sm:
    app: ./src
    peripherals: [spi]

chips:
  - gd32g553

diagnostics:
  log_level: info

Expected output

[gd32-bridge-ping] V2N supervisor MCU smoke test
[gd32-bridge-ping] init OK after 2 retries; firmware v0.2.9
[gd32-bridge-ping] SPI ping #0 -> 0
[gd32-bridge-ping] SPI get_version #0 -> 0 (v0.2.9)
[gd32-bridge-ping] SPI ping #1 -> 0
...

The current bridge firmware is v0.2.9 speaking wire protocol v0.7 — the driver auto-negotiates the v0.7 STATUS_SEQ stale-reply protection via LINK_FEATURES and degrades gracefully against older firmware.

For full command-set coverage (GPIO / PWM / ADC / DAC / QENC / TRNG / TMU, pass/fail accounting, transport recovery) see the SDK's v2n-gd32-bridge-hil-soak bench soak.

See also

• <alp/chips/gd32g553.h> — host driver API
• GD32 bridge protocol — wire spec (protocol v0.7)
• v2n-gd32-swd-flash — flashing the bridge firmware