<alp/pwm.h> — Pulse-Width Modulation

PWM channels for LED control, motor drive, servo pulses, fan control, audio prototyping, etc.

Header

#include <alp/pwm.h>
#include <alp/e1m_pinout.h>

Quick example

alp_pwm_t *pwm = alp_pwm_open(&(alp_pwm_config_t){
    .channel_id = E1M_PWM0,
});
if (pwm == NULL) return alp_last_error();

uint32_t period_ns = 1000000u;   // 1 kHz
uint32_t duty_ns   = 500000u;    // 50 %
alp_pwm_set(pwm, period_ns, duty_ns);

alp_pwm_close(pwm);

Config struct

Field	Type	Notes
channel_id	alp_pwm_id_t	E1M_PWM0 … E1M_PWM<N>.
polarity	alp_pwm_polarity_t	NORMAL / INVERTED.
default_duty_ns	uint32_t	Optional default at open time.

Operations

Function	Description
alp_pwm_set(pwm, period_ns, duty_ns)	Update period + duty in one call.
alp_pwm_set_duty(pwm, duty_ns)	Keep period, update duty only.
alp_pwm_enable(pwm) / alp_pwm_disable(pwm)	Gate the output without freeing the handle.

v0.5 extras

alp_pwm_capture_t adds input-capture support, and alp_pwm_single_pulse() emits a one-shot pulse without leaving the channel running.

V2N: GD32-side PWM

On the E1M-X V2N family, the eight cross-edge PWM channels are owned by the on-module GD32G553 supervisor MCU, not the Renesas SoC. The host driver routes alp_pwm_* calls through the GD32 bridge protocol:

gd32g553_t bridge;
gd32g553_init(&bridge, spi, brd_i2c, GD32G553_BRIDGE_DEFAULT_I2C_ADDR);
gd32g553_pwm_set(&bridge, /* channel */ 0u, 1000000u, 500000u);

The pwm-led-fade and v2n-pwm-fan-control examples demonstrate both paths.

See also

• Examples: pwm-led-fade
• <alp/peripheral.h>