v2n-pwm-fan-control

Ramp a GD32-side PWM channel along a five-stop fan curve. Demonstrates the host-to-GD32 path for alp_pwm_* calls: on the V2N family, all eight cross-edge PWM channels (PWM0..PWM7) are owned by the on-module GD32G553 supervisor — the Renesas SoC drives no PWMs (2026-05 hardware decision; see E1M-X V2N → GD32 supervisor MCU).

Source: examples/v2n/v2n-pwm-fan-control/.

board.yaml

schema_version: 2

som:
  sku: E1M-V2N101

carrier:
  name: E1M-X-EVK

cores:
  m33_sm:
    os: zephyr
    app: ./src
    peripherals: [pwm, spi, i2c]

chips:
  - gd32g553

diagnostics:
  log_level: info

Source (abbreviated)

#include <alp/pwm.h>
#include <alp/e1m_pinout.h>

static const struct { int temp_c; uint32_t duty_pct; } curve[] = {
    { 25,   0 }, { 40, 25 }, { 55, 50 }, { 70, 75 }, { 85, 100 },
};

int main(void) {
    alp_pwm_t *pwm = alp_pwm_open(&(alp_pwm_config_t){
        .channel_id = E1M_PWM0,
    });
    if (pwm == NULL) return -1;

    const uint32_t period_ns = 40000u;   /* 25 kHz, quiet for fan */

    for (size_t i = 0; i < ARRAY_SIZE(curve); i++) {
        uint32_t duty_ns = (period_ns * curve[i].duty_pct) / 100u;
        alp_pwm_set(pwm, period_ns, duty_ns);
        printk("[fan] %d C -> %u%% duty\n", curve[i].temp_c, curve[i].duty_pct);
        k_msleep(2000);
    }

    alp_pwm_close(pwm);
    return 0;
}

The application code is identical to pwm-led-fade; the wrapper routes through the GD32 transparently.

See also

• <alp/pwm.h> reference
• <alp/chips/gd32g553.h>
• GD32 bridge